The techniques described relate to the trimming and calibration of oscillators, and more particularly highly accurate oscillators which can serve as clock references in electronic platforms.
Clock reference oscillators must provide a highly stable output frequency versus the variation of the different electrical and environmental conditions such as and not limited to supply voltage, temperature, stress, humidity and aging. The trimming of such oscillator is imperative to achieve high performance.
The ever increasing complexity of electronic systems due to requirements of supporting multiple standards, increased functionality, higher data rates and memory in a smaller size and at a lower cost is pushing designers to increase the integration level through the development of Systems on Chip (SoC) in deep submicron Complimentary MOS (CMOS) technologies to benefit from the increased gate density. Every application requires a reference clock where the oscillator frequency must not vary due to changes in supply voltage and temperature by more than a specific amount.
Quartz crystal oscillators (XOs) are the industry standard for generating a reference clock. The mature and stable technology of quartz crystals permits excellent control on the manufacturing process to select an exact cut angle to produce superior performance. Crystal oscillators stemming from the very high quality factor (Q) of the quartz crystal can achieve high frequency accuracy, low frequency drift with temperature and low phase noise. Consequently, crystal oscillators dominated the commercial market for many decades. However, crystals have not managed to scale nor integrate thus limiting the size and cost reduction of the reference clock.
Recent efforts in using high-Q Micro-Electro-Mechanical Systems (MEMS) resonators and Film Bulk Acoustic Resonators (FBARs) have illustrated possibilities of integrating a high-Q element and Application Specific Integrated Circuits (ASIC) in the same package. The cost of a MEMS resonator is lower than a quartz one owing to the very high number of resonators on a single MEMS wafer. Expensive ceramic packaging of crystal oscillators is also reduced to low cost plastic packaging. However, the assembly cost of a MEMS-based solution requires stacking of the wafer level packaged MEMS die and the CMOS die. Additionally, elaborate production testing is required to trim each part to the required performance over the specified temperature range. This process may require more than one temperature insertion to estimate the temperature compensation parameters and to adjust the oscillator frequency to the required value. This makes the testing cost of MEMS and FBAR oscillators too high to compete with XOs for consumer applications.
Another approach is to produce reference clocks using RC oscillators. Due to the low quality factor of an RC oscillator the frequency accuracy is limited, but excellent power consumption and full integration can be achieved, making this solution suitable for applications like wireless sensors networks (WSN). However, the testing cost of RC oscillators like MEMS and FBAR oscillators is very high due the extensive trimming which usually requires more than one temperature insertion point.
An alternative technology uses an all silicon CMOS reference clock based on an on-chip LC-tank. Such solutions are by definition highly integrated and have short lead times due to their programmability compared to XOs. Moreover, they can provide frequency accuracy and phase noise performances comparable to XOs. However, the large temperature dependence of LC-tanks has been the main challenge in designing an LC-tank based reference which requires sophisticated compensation techniques to neutralize the frequency variation. To successfully achieve the required accuracy in compensation it is imperative not just to have an accurate temperature measurement but to also have precise knowledge of the oscillator frequency across temperature and its frequency tuning control(s).
One trimming routine starts by selecting a center frequency (fo) at a first temperature using a capacitor bank. Then at a second temperature the algorithm couples one or more resistances to the resonator as a method of temperature compensation. After that at a next temperature, the algorithm determines whether the required calibration has occurred over the predetermined temperature range or not. In case of not achieving the required performance the previous steps have to be redone iteratively until the total temperature dependence of the oscillator is minimized over the predetermined temperature range while attaining the required output frequency. Consequently, more than one temperature insertion point is required to achieve acceptable performance thus increasing the complexity of product testing and consequently increasing the overall cost of the product.
An all silicon CMOS reference clock is described in U.S. Pat. No. 8,072,281. It uses an on-chip LC-tank designed to operate at a very specific low temperature-sensitivity phase operating point. Thus, the architecture is applicable to a Self-Compensated Oscillator (SCO) that is self-compensated across temperature.